The only instruction that writes only 3 32-bit floats in Aarch32 is a multiple-load instruction:

r0 holds the address of the structure
FLDMIAS r0, {s0-s2}

This can be used either in VFP or Neon code.

I do not know about the corresponding intrinsic.

In DirectXMath I implemented the ARM-NEON version of XMLoadFloat3 as:

float32x2_t x = vld1_f32( reinterpret_cast<const float*>(pSource) );
float32x2_t zero = vdup_n_f32(0);
float32x2_t y = vld1_lane_f32( reinterpret_cast<const float*>(pSource)+2, zero, 0 );
return vcombine_f32( x, y );